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| Item number: 2794E-1532935 Manufacturer no.: 74AUP2G08DC,125 EAN/GTIN: 5059043670690 |
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| Low-power dual 2-input AND gate, The 74AUP2G08 provides the dual 2-input AND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Low static power consumption, ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial power-down mode operation Multiple package options More information: | | Logic Function: | AND | Mounting Type: | Surface Mount | Number of Elements: | 2 | Number of Inputs per Gate: | 2 | Schmitt Trigger Input: | Yes | Package Type: | VSSOP | Pin Count: | 8 | Logic Family: | AUP | Input Type: | CMOS | Maximum Operating Supply Voltage: | 3.6 V | Maximum High Level Output Current: | -4mA | Maximum Propagation Delay Time @ Maximum CL: | 24 @ 30 pF | Minimum Operating Supply Voltage: | 0.8 V | Maximum Low Level Output Current: | 4mA | Dimensions: | 2.1 x 2.4 x 0.85mm |
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| Other search terms: Latch, Latches, Latch circuit, Latch circuits, Schmitt trigger, Schmitt triggers, 1532935, Semiconductors, Logic ICs, Logic Gates, Nexperia, 74AUP2G08DC,125 |
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